Successfully processing semiconductor materials into often highly sophisticated integrated circuits depends on tight process controls. Fast turnaround testing of processed materials such as wafers becomes imperative for maintaining tight controls over successively processed wafer lots. After initial wafer preparation processes, such as polishing or epitaxial layer deposition, it becomes desirable to determine dopant concentrations at or near the intended device surfaces of the wafers. Such determinations can be made by known capacitance-voltage measurements. Such capacitance-voltage measurements require, however, a p-n junction or Schottky diode to be formed on the surface of the wafer to be tested. Frequently, the preparation of the wafer for the test, or the test itself, is destructive to the wafer, in that the preparation for the test or the test procedure damages the wafer to the extent that the tested wafer cannot be processed further to form the desired devices.
Consequently, in forming, for example, n-type epitaxial layers on bulk wafers, it has been a practice, in the past, to include special test wafers with every process lot of wafers placed into an epitaxial reactor. A typical radiantly heated barrel reactor, referred to herein as epi reactor, holds, on a susceptor, 14 wafers of a typical 100 mm diameter size.
According to the practice of processing the dedicated test wafers with each lot of process wafers, two of the 14 wafers are typically used for determining the acceptability of the grown epi layers on the other 12 wafers in each lot. These test wafers are strategically placed on the susceptor such that all other process wafers become positioned in the proximity of the test wafers. The assumption is that the process wafers grow epi layers of substantially the same thickness and with the same doping concentrations as the test wafers.
Using the test wafers has, of course, the disadvantage that the throughput of each epi reactor is reduced by approximately 14 percent. A further disadvantage is that the process wafers are accepted or rejected by deductive reasoning based on the assumption that the epi layer characteristics on the process wafers are substantially the same as those on the test wafers. A decision of such assumption may be wrong, however, when the characteristics measured on the test wafers are only marginally acceptable.
A nondestructive method for making capacitance-voltage measurements on p-type doped silicon material is known. Such a method, of course, has the advantage of eliminating the need for the dedicated test wafers, thereby raising the throughput of the referred to epi reactor by 17 percent, and further of permitting each process wafer to be tested separately in case a marginally acceptable lot of wafers has been processed.
According to the method, the p-type surface of the deposited epi layer is brought into contact with a column of mercury. The mercury is known to form a rectifying junction with a p-type doped silicon surface. The method requires stringent cleaning steps and preferably a nitric acid treatment of the silicon surface to be tested. However, once the rectifying junction has been formed at the interface between the mercury and the silicon material, well known test procedures are used to determine the doping concentration in the epi layer or in any p-type doped wafer to a depth which is equal to the depth of the depletion layer before the junction breaks down under the increasing reverse bias voltages. The voltage at which breakdown of the rectifying junction occurs limits the depth to which the doping profile can be determined. Until such breakdown occurs, the reverse bias voltage of the diode is stepped through a range of gradually increasing voltages. At each voltage level a capacitance measurement is made, the result of which yields, through calculations with equations well known in the art, the effective doping concentration down to the depth of the depletion layer at that particular reverse bias voltage.
An n-type silicon-to-mercury interface is known, however, to form an ohmic or non-rectifying contact. Thus, when the mercury column is brought into contact with the surface of a cleaned n-type wafer region, an ohmic contact is formed. The physical phenomenon which is advantageously available to nondestructively test p-type wafers, does not avail itself for testing n-type wafers.
However, it has been suggested to oxidize n-type wafers by boiling them for about one minute in a solution of nitric acid or hydrogen peroxide and sulfuric acid. It further has been suggested that such a preparation process produces an oxide layer between 20 and 50 Angstrom units thick. The presence of a layer of oxide between 10 and 100 Angstrom units has been looked upon as a physical requirement to form, by a little understood process referred to as quantum-mechanical tunneling, a rectifying junction at the interface layer between the mercury and the n-type silicon.
Unfortunately, attempts have failed to rapidly form low leakage current diodes at the mercury-to-silicon interface layer using the reported oxidizing agents to form a thin oxide layer on the surfaces on n-type wafers. At most, even with good process controls, high leakage current diodes have formed, but in most cases, substantially ohmic contacts have resulted. Thus, even with the suggested mechanism for forming rectifying junctions between mercury and n-type doped silicon surfaces, n-type wafers have continued to be processed with the prior art destructive testing techniques, simply because rectifying junctions could not be formed to test manufactured wafers with a mercury probe.